1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. dimmdrive solid state ide flash module with power failure protection* ide36 dimmdrive solid state ide flash module ide33 features 144 pin so-dimmpackage with ide pinouts plug-and-play solid state disk nand flash memory technology by sandisk 3.3 v and 5.0 v power supply operation 16mb ? 2gb memory density low power consumption ecc error correction 512 byte sector compatible to ide hd drives supports true ide mode commercial temperature range 0c - +70c pfp power failure protection circuit (ide36) power backup features (ide36) added pfp circuit built in to preserve card integrity during accidental power loss pfp circuit may not prevent le/data loss if power failure occurs during a long write operation pfp control circuit prevents false operations after power loss improves card integrity in applications with a high risk of power failure minimum power backup time of 10ms applications embedded systems internet access devices set top boxes web browser routers, networking web phones, car pc, dvd, hpc point-of-sale medical and telcom other applications requiring embedded or solid state storage general description the dimmdrive wed7gxxxide36 is a high performance single chip ash disk ide module with power failure protection circuit available in 144 pin so-dimm package. the dimmdrive wed7gxxxide33 does not have the additional pfp circuit. the additional circuit provides protection against accidental power loss. this circuit provides an internal power supply and control logic to stop receiving data and complete writing the last sector of data received. this is not intended to be backup for the host system. it will only allow the last sector received to nish writing and no more. it will improve card integrity in applications with a high risk of power failure. the read/write unit is 1 sector (512 bytes) sequential access. the module is based on sandisk nand flash technology and utilizes 128mb, 256mb, 512mb or 1gb memory components to provide the maximum in module density. the dimmdrive wed7gxxxide36/33 utilizes a sandisk flash chipset controller for the sandisk memory devices. this interface allows a host computer to issue commands to read or write blocks of memory in the flash memory array. the intelligence to manage the interface protocols, data storage and retrieval as well as ecc, defect handling and diagnostics are controlled by this device. automatic power management and clock control is handled by the controller as well. the dimmdrive wed7gxxxide36/33 module will have the same functionality and capabilities of an intelligent ata (ide) disk drive. once the device has been con gured by the user, it appears to the host as a standard ata disk drive. the on-board controller is a highly integrated solution designed to handle all intelligent operations, even the rare cases when new defects arise and need to be mapped out or replaced by a spare. the hardware performs the complicated task of ecc detection and correction and will return good data to the host. the controller manages all defects and errors and makes the flash memory appear * patent pending
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. as perfect memory to the host. the dimmdrive wed7gxxxide36/33 module also provides a more cost effective solution to the traditional hard disk media. the module is perfect for applications requiring upgrade ability to higher densities and for those applications with limited space availability and power consumption requirements. unlike standard ide drives, no cables or extra space is required. the module has no moving parts providing signi cant reduction in power consumption and increasing reliability. simply insert the module into a standard 144 pin so-dimm socket with ide pinout and you then have a bootable ash disk. the dimmdrive wed7gxxxide36/33 is available with memory densities of 16mb to 2gb. pin signal pin signal pin signal pin signal 2 gnd 38 d11 74 cs0# 110 a2 4v cc 40 nc 76 nc 112 nc 6 gnd 42 d3 78 nc 114 nc 8 nc 44 nc 80 cs1# 116 dasp# 10 d7 46 d12 82 iord# 118 pdiag# 12 nc 48 nc 84 iowr# 120 a1 14 d8 50 d2 86 nc 122 a0 16 nc 52 nc 88 nc 124 iocs16# 18 d6 54 d13 90 nc 126 v cc 20 nc 56 nc 92 nc 128 gnd 22 d9 58 d1 94 nc 130 nc 24 nc 60 nc 96 irq 132 nc 26 d5 62 d14 98 csel#* 134 nc 28 nc 64 nc 100 reset 136 nc 30 d10 66 d0 102 iordy** 138 nc 32 nc 68 nc 104 nc 140 nc 34 d4 70 d15 106 nc 142 nc 36 nc 72 nc 108 nc 144 nc notes: odd pins are nc (no connect). ?/? indicates signals active low. * low for master, high (open) for slave ** pulled up on the nc pins of the module, additional signals not used in the ide mode may be present. module pinout
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. signal name dir pin description reset i 100 host reset. reset signal from the host that is active on power up. d(15-0) i/o 70,62,54,46,38,30, 22,14,10,18,26,34, 42,50,58,66 host data. these 16 lines carry the data between the controller and the host. the low 8 lines transfer commands, status and ecc information between the host and the controller. iowr i 84 i/o write. this strobe pulse is used to clock data or commands on the host data bus into the controller. the clocking will occur on the negative to positive edge of the signal (trailing edge). iord i 82 i/o read. this is a read strobe generated by the host. this signal gates data or status on the host bus and strobes the data from the controller into the host on the low to high transition (trailing edge). csel i 98 this internally pulled up signal is used to con gure this device as a master or a slave. when this pin is grounded by the host, this device is con gured as a master. when this pin is high (or open), this device is con gured as a slave. irq o 96 interrupt request. this is an interrupt request from the controller to the host, asking for service. the output of this signal is tri-stated when the interrupts are disabled by the host. iocs16 o 124 i/o select 16. this open drain output is asserted low by the controller to indicate to the host the current cycle is a16 bit word data transfer. pdiag i/o 118 pass diagnostic. this bi-directional open drain signal is asserted by the slave after anexecute diagnostic command to indicate to the master it has passed its diagnostics. a(2-0) i 110,120,122 host address. these address lines are used to select the registers within the controller task le. cs0 i 74 host chip select 0. this is a chip select signal that is used to select the controller task le. cs1 i 80 host chip select 1. this is a chip select signal that is used to select the control and diagnostic register. dasp i/o 116 disk active/slave present. this open drain output signal is asserted low any time the drive is active. in a master/slave con guration, this signal is used by the slave to inform the master a slave is present. iordy o 102 this is an optional signal that is negated when the drive is not ready to respond to a data transfer request. for the module this signal is not used, the pin is pulled up. as long as the host obeys pio mode 0 or 4 timing, the module is guaranteed to respond properly. gnd 2,6,128 ground. vcc 4,126 power (3.3v ? 5v) signal description
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. control controller 16 n 2 and flash control d7 ? d0 d15 ? d8 data v cc power failure protection circuit (ide36) internal v cc internal v cc sandisk fig. 1 block diagram
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. power backup timing shown in the following two gures are the differences in operation between the wed7gxxxide33 module, and the wed7gxxxide36 module with power failure protection circuit. figure 1 shows how a sector is written to a nand flash. the entire sector is received and then is written at one time. the rdy/bsy line stays busy until proper writing of the data is ensured. if power loss occurs before the rdy/bsy line becomes ready again, the module may have correctly written the data, but this is not ensured. therefore the data may be corrupted. figure 2 shows the protected module. the power is again lost after the second sector (sector n+1) is received, but the internal backup power allows the sector to be properly written, and the card completes the write sector operation. data written/device ready device in write process/busy rdy/bsy sector write process power loss data transmitted external v cc internal v cc data received data written n n+1 possibly corrupted sector sector n sector n+1 sector n+2 sector n sector n+1 fig. 2 power loss without power failure protection circuit note: sector blocks in these diagrams do not represent a difference with size of data written, between the data received and th e data written. this represents the shorter time to write the data than to transmit it.
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. fig. 2: power loss with power failure protection circuit notes: all values quoted are typical at ambient temperatures and nominal supply voltage unless otherwise stated. sleep mode current is speci ed under the condition that all inputs are at static cmos levels and in a ?not busy? operating state. power loss data transmitted external v cc data received data written internal v cc note: t backup > t sw t backup t sw valin v cc threshold sector n+1 sector n sector n sector n+2 n+1 n sector n+1 temperature operating non-operating 0 c to 70 c -25 c to 85 c humidity operating non-operating 8% to 95 %, non-condensing 8% to 95 %, non-condensing acoustic noise 0 db altitude (relative to sea level) operating non-operating 80,000 feet maximum environmental specifications 3.3 v 5 v dc input voltage (v cc ) 100 mv max. ripple (p-p) 3.3v +/- 5% 5v +/- 10% see notes sleep reading writing read/write peak 200 a 21 ma 24 ma 150 ma/50 s 500 a 34 ma 34 ma 150 ma/50 s power requirements
7 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. reliability and maintenance package mtbf (@ 25 c) > 1,000,000 hours preventive maitenance none data reliability <1 non-recoverable error in 10 14 bits read <1 erroneous correction in 10 20 bits read endurance (commercial temp.) 300,000 erase/program cycles per block typical .160 max. for ide36 .039 .004 .044 max. .157 .070 .004 (2x) .080 (2x) .913 1.112 .181 1.291 .236 (2x) .787 2.165 2.660 wedc 298
8 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs wed7gxxxide36 wed7gxxxide33 july, 2003 rev. 0 preliminary* white electronic designs corp. reserves the right to change products or speci cations without notice. prefix product group 7 flash substrate f fra w/tin leads contact g fra w/gold contact capacity 016 16mb 416 416mb 032 32mb 448 448mb 048 48mb 480 480mb 064 64mb 512 512mb 080 80mb 576 576mb 096 96mb 640 640mb 112 112mb 704 704mb 128 128mb 768 768mb 144 144mb 832 832mb 160 160mb 896 896mb 176 176mb 960 960mb 192 192mb 1g0 1024mb 208 208mb 1g1 1152mb 224 224mb 1g2 1280mb 240 240mb 1g4 1408mb 256 256mb 1g5 1536mb 288 288mb 1g6 1664mb 320 320mb 1g7 1792mb 352 352mb 1g9 1920mb 384 384mb 2g0 2048mb card family & version ide33 sandisk based ide module ide36 sandisk based ide module with pfp circuit options a reset low (standard) package d so-dimm; 144 temperature range c commercial 0c to +70c speed 25 250ns ordering information?dimmdrive part number matrix wed 7 g 256 ide36 a d c 25
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